Three-dimensional (3D) integration has opened new potentialities for the event of denser circuits with extra interconnected digital parts. 3D integration approaches entail stacking a number of layers of digital circuits collectively, finally producing extra compact and environment friendly units.
These electronics fabrication methods can cut back each the scale and the facility consumption of electronics whereas additionally boosting their efficiency. An rising 3D integration strategy that has been discovered to be significantly promising is monolithic 3D (M3D) integration, which includes the development of transistors layer by layer on the identical substrate as an alternative of bonding particular person chips collectively.
Researchers at Pennsylvania State University not too long ago developed extremely compact near-sensor computing chips by way of the heterogeneous M3D integration of two-dimensional (2D) supplies. Their paper, published in Nature Electronics, demonstrates the fabrication of those chips utilizing scalable methods which can be appropriate with current manufacturing processes.
“M3D integration is being increasingly adopted by the semiconductor industry as an alternative to traditional through-silicon via technology, as a way to increase the density of stacked, heterogenous electronic components,” Subir Ghosh, Yikai Zheng and their colleagues wrote of their paper. “M3D integration can also provide transistor-level partitioning and material heterogeneity. However, there are few large-area demonstrations of M3D integration using non-silicon materials.”
As a part of their current research, Ghosh, Zheng and their colleagues got down to develop a sensing and near-sensor computing chip primarily based on 2D electronics using an M3D integration technique. The chip they created integrates over 500 chemitransistors and over 500 memtransistors, with vertical interconnects (vias) which can be 3 μm in measurement and at a 1 μm distance from one another.
“We report heterogeneous M3D integration of two-dimensional materials using a dense inter-via structure with an interconnect (I/O) density of 62,500 I/O per mm2,” Ghosh, Zheng and their colleagues wrote. “Our M3D stack consists of graphene-based chemisensors in tier 2 and molybdenum disulfide (MoS2) memtransistor-based programmable circuits in tier 1, with more than 500 devices in each tier. Our process allows the physical proximity between sensors and computing elements to be reduced to 50 nm, providing reduced latency in near-sensor computing applications.”
A key benefit of the M3D integration strategy employed by the researchers is that all the fabrication course of takes place at temperatures below 200 °C. This implies it’s appropriate with back-end-of-line integration processes at the moment used to manufacture semiconductor-based units.
As a part of their research, Ghosh, Zheng and their colleagues used the computing chip they developed for chemical codification. Particularly, they developed an alert system that may very well be used to establish and classify totally different chemical compounds.
The chemitransistors within the crew’s chip have been uncovered to sugar options with totally different concentrations and {the electrical} indicators they generated in response to those options have been recorded. Subsequently, memtransistors processed the indicators generated by the chemitransistors, changing them into analog and digital codes.
The findings of the crew’s alert system demonstrations spotlight the potential of the brand new near-sensing computing chip for processing and classifying chemical compounds. Sooner or later, their proposed fabrication strategy may very well be scaled as much as develop chips with a good better variety of circuits and sensors, which may sort out extra superior classification duties.
Extra data:
Subir Ghosh et al, Monolithic and heterogeneous three-dimensional integration of two-dimensional supplies with high-density vias, Nature Electronics (2024). DOI: 10.1038/s41928-024-01251-8
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Creating compact near-sensor computing chips by way of 3D integration of 2D supplies (2024, November 10)
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